Typically, a computer system includes a number of integrated circuit chips that communicate with one another to perform system applications. Chip speeds continue to increase and the amount of data communicated between chips continues to increase to meet the demands of system applications. As the volume of digital data communicated between chips increases, higher bandwidth communication links are needed to prevent data communication bottlenecks between chips.
Often, a computer system includes a controller, such as a micro-processor, and one or more memory chips, such as random access memory (RAM) chips. The RAM chips can be any suitable type of RAM, such as dynamic RAM (DRAM), double data rate synchronous DRAM (DDR-SDRAM), graphics DDR-SDRAM (GDDR-SDRAM), and pseudo static RAM (PSRAM). The controller and RAM communicate data with one another to perform system applications.
Typically, data is received at an integrated circuit, such as a RAM, and sampled via a strobe signal that is also received at the integrated circuit. Multiple data signals can be sampled in parallel via one strobe signal to provide multiple strobe signal rising edge data bits and multiple strobe signal falling edge data bits. The sampled data bits are clocked into the integrated circuit via a clock signal.
As chip speeds increase, the amount of data communicated between chips increases to meet the demands of system applications. Higher bandwidth communication links can be built by communicating more data signals in parallel and/or increasing input/output (I/O) data bit and strobe signal speeds. However, using one strobe signal to sample an increased number of data signals in parallel can increase the skew of the strobe signal and the sampled data bits, which can contribute to setup and hold window shifts during sampling of the data signals and clocking the sampled data bits into the integrated circuit. Also, increasing data bit and strobe signal speeds exacerbates the strobe signal and sampled data bit skew problem related to clocking the sampled data bits into the integrated circuit via the clock signal.
For these and other reasons there is a need for the present invention.